ASIC

An application-specific integrated circuit (abbreviated as ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. In Bitcoin mining hardware, ASICs were the next step of development after CPUs, GPUs and FPGAs. Capable of easily outperforming the aforementioned platforms for Bitcoin mining in both speed and efficiency, all Bitcoin mining hardware that is practical in use will make use of one or more Bitcoin (SHA256d) ASICs.

Note that Bitcoin ASIC chips generally can only be used for Bitcoin mining. While there are rare exceptions - for example chips that mine both Bitcoin and Litecoin - this is often because the chip package effectively has two ASICs: one for Bitcoin and one for Litecoin.

The ASIC chip of choice determines, in large part, the cost and efficiency of a given miner, as ASIC development and manufacture are very expensive processes, and the ASIC chips themselves are often the components that require the most power on a Bitcoin miner.

While there are many Bitcoin mining hardware manufacturers, some of these should be seen as systems integrators - using the ASIC chips manufactured by other parties, and combining them with other electronic components on a board to form the Bitcoin mining hardware.

Bitcoin ASIC development pace

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CoinTerra Goldstrike timeline

The pace at which Bitcoin ASICs have been developed, for a previously non-existent market, has seen some academic interest. One paper titled "Bitcoin and The Age of Bespoke Silicon" notes:

We examined the Bitcoin hardware movement, which led to the development of customized silicon ASICs without the support of any major company. The users self-organized and self-financed the hardware and software development, bore the risks and fiduciary issues, evaluated business plans, and braved the task of developing expensive chips on extremely low budgets. This is unheard of in modern times, where last-generation chip efforts are said to cost $100 million or more

—Michael Bedford Taylor, University of California, http://cseweb.ucsd.edu/~mbtaylor/papers/bitcoin_taylor_cases_2013.pdf

The Bitcoin and Cryptocurrency Technologies online course by Princeton University notes:

The amazing thing about Bitcoin ASICs is that, as hard as they were to design, analysts who have looked at this have said this may be the fastest turnaround time - essentially in the history of integrated circuits - for specifying a problem, which is mining Bitcoins, and turning it around to have a working chip in people's hands.

—Joseph Bonneau, Postdoctoral research associate, Princeton University, https://www.youtube.com/watch?v=jXerV3f5jN8#t=26m40s

A timeline overview for CoinTerra's Goldstrike 1 chip also shows this as 8 months between founding the company and shipping a product.

Bitcoin ASIC specifications

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Bitcoin ASIC efficiency vs hash rate

A Bitcoin ASIC's specification could be seen as having a certain hash rate (e.g. Gh/s) at a certain efficiency (e.g. J/Gh). While cost is another factor, this is often a relatively fixed factor as the minimum cost of a chip will be determined by the fabrication process, while the maximum cost will be determined by market forces, which are outside of post-fabrication technological control.

When reading the specifications for ASICs on this page is that they should be interpreted as being indicative, rather than authoritative. Many of the figures will have come from the manufacturers, who will present their technology in the best light - be that high hash rates that in practice may not be very efficient and require additional cooling, or very high efficiency at a cost of hash rate and risking being slow in the race against difficulty adjustments.
Complicating the matter further is that Bitcoin ASICs can often be made to cater to both ends of the spectrum by varying the clock frequency and/or the power provided to the chip (often via a regulated voltage supply). As such, chips can not be directly compared.

Comparing Bitcoin ASICs

Two proposals have been made in the past for attempts at comparing ASICs - Gh/mm² and η-factor.
Gh/mm² is a simple measure of the number of Gigahashes per second of the chip, divided by its die area (area of the the actual silicon). This measure however does not take into account the node size which affects how many logical cells can fit in a given area.
As a result, η-factor was suggested at the BitcoinTalk Forums which attempts to take the node size into account, by multiplying the Gh/mm² value by the half the node size, three times.

Although the merit of these approaches can be debated, ultimately these figures are not as important as the ones that detail what is required to make an ASIC work. If an ASIC requires highly stable power supply, then the power supply circuitry on a board may be more expensive than for another ASIC. If the ASIC has a complex communications protocol, additional relatively expensive components may be required. If an ASIC's die is large, fewer (rectangular slices) can be obtained from a (circular) wafer, defects affect its design dispropotionately, and cooling solutions are generally more complex compared to smaller die chips which in turn have other overhead. Chips with a BGA design are less simple to integrate than a QFN, requiring more expensive (inspection and testing) equipment.
Nevertheless, for historic purposes they are included in listings here where sufficient information is available.

Number of cores

One other oft-mentioned number statistic for an ASIC chip is the number of cores or hashing engines that are on the chip. While this number is directly related to performance, it is not necessarily a comparitive relation.
Bitmain Technologies' BM1382 calculates 63 hashes per clock cycle (Hz), while their more efficient BM1384 calculates 55 hashes per clock cycle. Similarly, while these hashes per clock cycle are spot-on for the claims regarding the number of cores, BitFury's BF756C55 is claimed to have 756 cores, but yields around 11.6 hashes per clock cycle. This is because the reference to cores sometimes mean different things, and certain designs result in less straightforward calculation
Nevertheless, when a designer makes claims regarding hash rates at certain clock frequencies, one can determine if A. there is a straightforward calculation and B. if the designer is being imprecise (rounding values) or even intentionally dishonest, as the ratio between clock cycles and hash rate should remain the same.

ASIC development projects

21

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21 Inc. Unknown BCT Facilitators: Qualcomm No introduction date known	No pictures available
Needs more information (see notes for details)
21, formerly 21e6, is believed to use their own developed chip given their staff. However, little public information about the hardware used is known.

ASICMiner

ASICMiner Facilitators: BitQuan,BitFountain	Top Bottom
BE100 BCT Introduced: 2012-Dec-28
Technical specifications Package: Sawn QFN40 6x6mm Markings: BE100 Die:4.66x4.66mm@130nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.336 6 167 1.05 336 2.016 1 0.02 4249.2 0.392 8 125 1.15 392 3.136 1 0.02 4957.4
Notes: The letters 'BE' in the component name/markings stands for "Block Erupter". ASICMiner considers the BE100 their 'Gen1' product.
Used on: Block Erupter USB, Block Erupter Cube, Block Erupter Blade

ASICMiner unknown BCT Facilitators: BitQuan,BitFountain Planned: 2012-Nov	No pictures available Die:65nm
Canceled (see notes for details)
Notes: This chip would formally have been ASICMiner's 'Gen2' product. Development appears to have been canceled prior to production.

ASICMiner Facilitators: BitQuan,BitFountain	Top (8x8mm) Bottom (9x9mm)
BE200www BCT Introduced: 2014-Mar-28 Datasheet: package dimensions,pins/protocol, pinout
Technical specifications Package: Sawn QFN64 8x8mm Markings: BE200 / [lot] Known codes: lot:8P01N,9C01H,9P02A,9P02H Die:40nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 9.6 0.66 1515 0.8 6.336
Notes: ASICMiner considers this their 'Gen3' product. Was made available in 8x8mm and 9x9mm packages.
Used on: ASICMiner Tube, ASICMiner Prisma

ASICMiner Facilitators: BitQuan,BitFountain	Top Layout
BE300S prototype BCT Introduced: 2014-Sep-16
Technical specifications Package: Sawn QFN40* Markings: BE300S Die:28nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 3 0.187 5342 0.5616 5.2 0.247 4050 1.28388
Notes: This was a prototype manufactured on an MPW. The package appears to be soldered on only 2 sides, which may imply that internally there are also only bond wires to those two sides.

ASICMiner BE300(S) BCT Facilitators: BitQuan,BitFountain Planned: 2015-Feb	No pictures available Package: FCLGA 5x5mm Die:28nm Foundry: TSMC
May not actually exist (see notes for details)	Mining: 8Gh/s 0.038J/Gh, 12Gh/s 0.038J/Gh, 6Gh/s 0.033J/Gh, 9Gh/s 0.022J/Gh
Notes: ASICMiner would consider this their 'Gen4' product. The expected hashing performance and package size is preliminary. The BE300(S) is understood not to be in production at this time.

ASICMiner Unknown a 2015 16nm chip co-developed with BitQuan,BitFountain. The planned node size would be 16nm or 14nmThis chip is planned to be introduced in the future.

ASICrising GmbH

ASICrising Facilitators: RacyICs	Top (logo) Top (no logo) Bottom
Wolfbloodwww BCT Introduced: 2013-Aug
Technical specifications Package: Sawn QFN88 10x10mm Markings: with logo:Wolfblood logo / WOLFBLOOD-A0 / [lot1] / [lot2][date] without logo:[illegible / illegible / illegible][date] Known codes: WB4230-1A0 / UXYK3604647.4913,1214 Die:28nm Foundry: Global Foundries	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 9.12 0.65 1538 5.928 10.6 0.75 1333 7.95
Notes: Only produced in a limited run, as ASICrising opted against making a full mask while their 28nm design was close to being finalized.. Package size is an estimate based on neighboring components.

ASICrising Wolfblood XEwww BCT Facilitators: RacyICs Planned: 2014-Aug	No pictures available Die:8.45x8.45mm@28nm (custom+cell) Foundry: Global Foundries
May not actually exist (see notes for details)	Mining: 100Gh/s 0.19J/Gh, 125Gh/s 0.29J/Gh, 150Gh/s 0.29J/Gh
Notes: Third hash rate listed is based on Gh/mm² numbers using the 100Gh as the base value. This was also used to derive the die size for further calculations. As of 1 April 2015 (2015 -04-01) the ASICrising website states that the design is "Tapeout-ready", implying that it has not yet been manufactured.

ASICrising Wolfblood x14 a 14nm 200Gh/s 0.08J/Gh chip . As of 1 April 2015 (2015 -04-01) no further information on this potential chip has become available beyond the Coinbau investment brochure.

Avalon Project

Avalon Project Facilitators: Canaan Creative, BitSynCom, Gridchip	top bottom Layout Die (power) Die (cores)
A3256www BCT Introduced: 2013-Jan-20 Datasheet: datasheet, package
Technical specifications Package: Sawn QFN48 7x7mm Markings: Old Avalon logo / A3256-Q48 / [lot/date] Known codes: P6M56213042C,P6M56313052C,PPT87813212C Die:3.976x4.056mm@110nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.295 6.6 152 1.15 375 1.947 0.79 0.02 3043.45
Notes: First ASIC to be put to market, with first delivery of a miner to Jeff Garzik.

Avalon Project Facilitators: Canaan Creative, BitSynCom, GridChip	Top Bottom (mockup)
A3255www BCT Introduced: 2013-Aug Datasheet: datasheet, package
Technical specifications Package: Sawn QFN48 7x7mm Markings: Avalon logo / A3255-Q48 / [lot/date] Known codes: SKWL0613452CMU Die:55nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 1.5 1.6 625 0.8 750 2.4 2 1.5 2.45 408 1.0 750 3.675 2
Notes: GridChip's involvement with this chip is disputed.

Avalon Project Facilitators: Canaan Creative, BitSynCom	Top Bottom
A3233www Introduced: 2014-Apr Datasheet: datasheet, package
Technical specifications Package: Sawn QFN48 7x7mm Markings: Avalon logo / A3233-Q48 / [lot/date] Known codes: P6P73914092CMU,P6P73914102CAL Die:40nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 7.08 0.75 1333 0.55 600 5.31 11.8 7.08 0.89 1124 0.89 600 6.3012 11.8

Avalon Project Facilitators: Canaan Creative, Alchip Technologies, Ltd (世芯电子)	Top Bottom (mockup)
A3222www BCT Introduced: 2014-Sep Datasheet: datasheet, package
Technical specifications Package: Sawn QFN56 8x8mm Markings: Avalon logo / A3222-Q56 / [lot/date] Known codes: T8A98911434EMAA,T4V9181435ECLA Die:28nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 25 0.4 2500 0.65 400 10 62.5 25 0.6 1667 0.8 400 15 62.5

Avalon Project Unknown a 2015-Jul chip co-developed with Canaan Creative. This chip is rumored to become available around July of 2015.

BIOSTAR Group

BIOSTAR Group	Top (marked) Top (unmarked)
Cobrawww BCT Introduced: 2014-Mar-17
Technical specifications Package: Sawn QFN48 7x7mm Markings: unmarked: n/a marked: Cobra / [lot] / [date]G030 Known codes: D7LJK. 1 / 1348 Die:110nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.375 5.417 185 2.03125
Notes: Efficiency is as specified at the board. Package size is an estimate based on neighboring components.

BitDragonfly

BitDragonfly	Top
Unknown Introduced: 2014-Jan Needs more information (see notes for details)
Technical specifications Package: Markings: BitDragonfly / CA2472 / L[date] Known codes: 1403
Not much is known about this chip other than that it existed, was technologically successful, but financially expensive - as noted by Bitcoin entrepreneur Li Xiaolai

BitFury Group

BitFury Group Facilitators: IMEC,Europractice,BioInfoBank Institute	Tops/Bottom Layout Layout Die (optical) Die (power) Die (cores)
BF756C55www BCT Introduced: 2013-Jun-14 Datasheet: unofficial datasheet package pinout compilation
Technical specifications Package: Sawn/Punched QFN48 7x7mm Markings: β: β / 5Ghash / [date] / [lot] / TT BioInfoBank: BioInfoBank logo / BIB756C55NM-BF / [date] / [lot] CCCP: CCCP logo / CCCP756C55NM-BF / [date] / [lot] Known codes: β: KRT8G, BioInfoBank: 1336/KYG0H, 1404/KCKCL, CCCP: 1340/KYW3Q Die:3.8x3.8mm@55nm(custom+auto) Foundry: UMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 2.675 0.78 1281 0.835 230 2.0875 11.63 0.19 3852.61 2.7 0.8 1250 0.835 2.16 0.19 3888.61
Notes: BitFury Group considers this their Gen 1, Rev 1 product. It was originally designed at 65nm but die-shrunk down to 55nm. It was widely released in at least 3 different packages/markings: The 'beta' / 5Ghash (estimated hash rate before practical tests) markings on a sawn package, BioInfoBank and CCCP markings on a punched package. High efficiency claims were made by BitFury that at this time seem unrealistic. BitcoinTalk user vs3 holds a large collection of technical information about this chip in his NanoFury repository

BitFury Group Facilitators: IMEC,Europractice	Top Bottom
BF864C55www BCT Introduced: 2014-Mar-03
Technical specifications Package: Punched QFN48 7x7mm Markings: BitFury Logo / BF864C55 / [lot] Known codes: KCYLT,KCTMS Die:55nm(full custom) Foundry: UMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 3.8 0.5 2000 0.5 1.2
Notes: BitFury Group considers this their Gen 1, Rev 2 product. This chip is pin- and protocol-compatible with the BF756C55, allowing many existing designs based on the BF756C55 to be upgraded.

BitFury Group Unknown a 40nm chip . BitFury Group would have considered this their Gen 3 product. No information is available on whether the earlier 'Gen 1 Rev 2' is to be seen as 'Gen 2'.This chip may have been canceled altogether.

BitFury Group Unknown BCT Introduced: 2015-Feb-28	No pictures available Die:28nm (full custom)
Needs more information (see notes for details)	Mining: 0.2J/Gh
Notes: BitFury Group considers this their Gen 4 product.. BitFury Group have stated that they will not be making chip samples or details available. As this chip is claimed to exist by a reputable party (BitFury Group), the information in this template requires expansion.

BitFury Group Unknown a 16nm 0.06J/Gh chip . BitFury Group considers this their Gen 5 product.This chip is planned for the future and specifications are highly subject to change.

Bitmain Technologies Ltd.

Bitmain Technologies Ltd.	Top Top Bottom
BM1380www BCT Introduced: 2013-Nov-11 Datasheet: datasheet
Technical specifications Package: Sawn QFN56 8x8mm Markings: Blank: n/a Common: Antminer logo / BM1380 / [lot/date] Known codes: U02014G7 Die:3.464x3.464mm@55nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 1.6 0.667 1500 0.75 196 1.067 8.16 0.13 2773.08 2 0.847 1181 0.85 1.694 0.17 3466.35 2.5 1.128 886 1.00 2.821 0.21 4332.94 2.8 1.32 758 1.10 325 3.695 8.62 0.23 4852.89
Notes: Bitmain considers this their 'Gen 1' product.

Bitmain Technologies Ltd.	Top Bottom (mockup)
BM1382www BCT Introduced: 2014-Apr Datasheet: datasheet
Technical specifications Package: Sawn FCQFN56* 8x8mm Markings: Antminer logo / BM1382 / [lot/date] Known codes: A10014P1,A10014Z2 Die:28nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 14.18 0.528 1893 0.72 225 7.49 63.02 17.33 0.702 1425 0.80 275 12.16 63.02 6.3 100 63 25.2 400 63
Notes: Bitmain considers this their 'Gen 2' product. This chip uses a custom physical pin configuration that should be treated as a QFN with multiple exposed pads.

Bitmain Technologies Ltd.	Top Bottom (mockup)
BM1384www BCT Introduced: 2014-Sep Datasheet: datasheet
Technical specifications Package: Sawn FCQFN32* 8x8mm Markings: Antminer logo / BM1384 / [lot/date] Known codes: A10014o1 Die:28nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 8.25 0.249 4009 0.60 150 2.058 55 15.125 0.354 2823 0.72 275 5.357 55 22 0.448 2234 0.80 400 9.848 55
Notes: Bitmain considers this their 'Gen 3' product. This chip uses a custom physical pin configuration that should be treated as a QFN with multiple exposed pads.

Bitmain Technologies Ltd. Unknown a 2015-Jul chip . This chip is rumored to become available around July of 2015 for integration into their Antminer S6 product.

Black Arrow

Black Arrow Ltd Facilitators: Verisilicon	Top Bottom (mockup) Layout
Minionwww BCT Introduced: 2014-Apr-10 Datasheet: datasheet footprint
Technical specifications Package: MCM UFCBGA900 25x25mm Markings: Black Arrow logo / Black Arrow LTD / MINION / 99s256 / [date] / [lot] Known codes: 1418 UXYL09065.000 Die:28nm Foundry: Global Foundries	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 99 0.85 1000 99 118.8 0.85 1200 99 50 0.5 2000 25 1.01
Notes: string

Black Arrow Ltd Unknown a 2015-May 14nm 0.3J/Gh chip . Tape-out was purportedly in December 2014This chip is slated for the future.

Btc-Digger

Btc-Diggerwww	Top
Unknownwww BCT Introduced: 2013-Aug-10 Needs more information (see notes for details)
Technical specifications Package: QFP48 7x7mm Markings: none Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.15 150 1 0.25 250 1
Notes: Date is tape-out date. Little is known about this Bitcoin ASIC other than that it existed and was used in a small number of miners on the Chinese market

BTCGARDEN

BTCGARDENwww	Top (V2) Top (V3) Layout Layout
Garden BCT Introduced: 2013-May-22
Technical specifications Package: LQFP64 10x10mm Markings: GardenV[batch] / 0924 Known codes: 2, 3 Die:130nm Foundry: SMIC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.4 3.75 267 1.25 400 1.5 1
Notes: Date is tape-out date.

BTCGARDENwww Unknown a 2013-Dec 40nm chip . Along with an IPO, BTCGARDEN's 40nm endeavours were canceled. BTCGARDEN would then go on to use ASICMiner's BE200 40nm chip in mining products.

Butterfly Labs, Inc.

Butterfly Labs, Inc. Facilitators: Chronicle Tech (now Custom Silicon Solutions)	Tops/Bottom Layout Die Die (detail)
BitForce SCwww BCT Introduced: 2013-Feb-08 Datasheet: datasheet(alt) protocol(alt)
Technical specifications Package: FCBGA144 10x10mm Markings: Blank:n/a ButterFly Labs Logo / BUTTERFLYLABS / BFSC100F144 / US10 / [lot] [date] Known codes: 6770 3013,1393 3513 Die:7.5x7.5mm@65nm(full custom) Foundry: Global Foundries/IBM	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 4.2 2.857 350 12 0.07 2563.17 4 3.2 313 1.0 250 12.8 16 0.07 2441.11
Notes: ASIC based on their FPGA design. The first publicly known to exist Bitcoin ASIC.

Butterfly Labs, Inc. Facilitators: Custom Silicon Solutions	Top Bottom (mockup) Die (optical) Layout
Monarch BCT Introduced: 2014-Aug-21
Technical specifications Package: FClBGA1188 (36x33) 24x21mm Markings: Butterfly Labs logo / BFSC28NM02 2006 / FPBGA1188 [date] / [lot?] Known codes: 2614 Die:24x21mm@28nm Foundry: Global Foundries	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 400 0.27 3704 108 0.79 2177.78 600 0.39 2564 234 1.19 3266.67 1000 0.55 1818 550 1.98 5444.44 1600 0.76 1316 1216 3.17 8711.11
Notes: Die/package size are derived estimates based on wafer and board images with other known dimensions.

Clam Ltd

Clam Ltd	Top Bottom (mockup)
CLSH55Q100 BCT Introduced: 2013-Nov-18 Datasheet: datasheet
Technical specifications Package: Sawn QFN100 12x12mm Markings: CLAM logo / CLSH55Q100 Die:55nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 2.1 476 1.0 2.56 2.5 400 1.1 320 6.4 8 3.2 3 333 1.2 400 9.6 8 3.3 420 7.86

CoinTerra, Inc.

CoinTerra, Inc. Facilitators: Open-Silicon	Top Bottom (mockup) Top Layout (1 die)
GoldStrike 1www BCT Introduced: 2013-Nov-08 Datasheet: infosheet, presentation presentation video
Technical specifications Package: QMCM FCBGA1296 37.5x37.5mm Markings: Q1 only: COINTERRA / GoldStrike 1 / [lot] / [date] TAIWAN Q1-4: COINTERRA / GoldStrike 1 / [lot] / [date] TAIWAN Known codes: Q1:UOLK46001B10 / 1352, Q1-4: UOLL04004.01A / 1403, UOLL04004.01A / 1414, UOLK46006.01A / 1403 Die:20x10mm@28nm Foundry: Global Foundries Dresden	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 504 0.7 1400 360 2.52 6914.88 720 2000 360 3.6 9878.4 0.595 1680 0.765
Notes: Although the MCM package shows 4 dies, only 3 are active silicon. Die size is thus based on 2*10x10mm

CoinTerra, Inc. SHIVAwwwBCT a 2014-Sep-18 16nm 0.225J/Gh chip co-developed with Global Unichip Corp. Assumed not to have gone into production before CoinTerra's Chapter 7 Bankruptcy.

DigBig

DigBigwww Facilitators: Gevey / FuriousBTC / Zhen Liu	Top Bottom
FB1600 BCT Introduced: 2014-Mar-30
Technical specifications Package: CSP BGA168 (12x14) 5x6mm Markings: DigBig logo / DIGBIG FB1600 / [date] / SGCQP-001 Known codes: 1412 Die:5x6mm@40nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 15.625 0.95 1053 14.84375 0.52 4166.67 12.005 0.85 400 30.01 0.4 3201.23 15.212 0.925 496 30.67 0.51 4056.55 16.696 1.000 544 30.69 0.56 4452.28

Gridchip

Gridchip UnknownBCT a 2013-Jul-04 40nm 2Gh/s chip . This chip was canceled, however its technology would eventually surface in the Gridseed GC3355.See also: GridSeed, SFARDS

Gridseed

Gridseed Facilitators: GridChip	Top Bottom
GC3355www BCT Introduced: 2013-Dec Datasheet: datasheet, I/O appnote register settings
Technical specifications Package: Sawn QFN64 8x8mm Markings: Gridseed logo / BTC & LTC / GC3355-Q64 / [lot/date] Known codes: P6P19013462C Die:40nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 1 2.35 426 1.0 400 2.35 2.5 1.5 2.327 430 1.0 600 3.49 2.5 1.875 2.347 426 1.0 750 4.4 2.5 2.25 2.356 425 1.0 900 5.3 2.5
Notes: This chip can perform SHA256(d) and Scrypt calculations. The performance figures are strictly for the SHA256(d) portion. The 'GC' in the product code stands for 'Gridchip'. See also: GridChip, SFARDS.

HashFast Technologies, LLC

HashFast Technologies, LLC Facilitators: Uniquify,Ciara,Signetics,Sandgate	Top Bottom Die (1/4) Layout (1/4) Engine
Golden Noncewww BCT Introduced: 2013-Dec-19 Datasheet: datasheet protocol*
Technical specifications Package: QMCM FCBGA1936 43x43mm Markings: Blank: n/a Q1 HashFast logo / GN-A0-CBH / [lot] / [date] KOREA Known codes: T6A377.L0 4813, T6A385.00 0314, T6A416.00 1014 Die:18x18mm@28nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 422.4 0.65 1538 0.81 550 274.56 768 1.3 3577.36 537.6 700 768 1.66 4553.01 768 1000 768 2.37 6504.3
Notes: 'Golden Nonce' is a term used in Bitcoin mining, see: Golden Nonce The MCM has four dies with active silicon, and each die is 9x9mm, giving an 18x18mm total die size. * The Golden Nonce communication protocol was released released as open source - however, in court proceedings, it became clear that HashFast applied for a patent on this protocol.

HashFast Technologies, LLC generation 2' a 2013-Aug-21 16nm chip co-developed with DXCorr. Date is initial design start date. Plans of this chip were revealed in HashFast's bankruptcy case. Although listed here under HashFast Technologies, the IP rights lay with DXCorr.This chip was canceled at some point during its development, in favor of 'generation 1.5

HashFast Technologies, LLC generation 1.5 a 2013-Dec-01 28nm chip co-developed with DXCorr. Date is initial design start date. Plans of this chip were revealed in HashFast's bankruptcy case. Development of this chip began after 'generation 2.0' was canceled.This chip was canceled after DXCorr ceased verbal communication pending HashFast's bankruptcy case.

HASHRA Limited

HASHRA Moonrakerwww BCT Planned: 2014-Dec	No pictures available Die:28nm
Future (see notes for details)
Notes: Hashra has traditionally used existing hardware, reselling these 'as is' or in custom cases. The chip used in the Moonraker product may well be a pre-existing chip of unstated origin. At least one party noted that As of 9 September 2014 (2014 -09-09), the chips should exist Recent BitcoinTalk Forum posts indicate that this hardware is still under development - after numerous delays, despite taking orders.

iCoinTech

iCoinTech	Top
QT20 BCT Introduced: 2014-Jan-02
Technical specifications Package: Sawn QFN64 8x8mm Markings: QT20 / CA3755 / X[date] Known codes: 1349 Die:130nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.315 0.38 0.3 8.233 121 2.47
Notes: Efficiency is at the board level for single-chip USB device.
Used on: iCoinTech iMiner, T-Miner

iCoinTech Unknown a 2014-Apr chip . A next chip was mentioned, and in a private message to TheRealSteve, iCoinTech noted that there were unexpected delays. No new information has since surfaced, and it may have been canceled.

Innosilicon

INNOSILICON Technologies LTD Co. Facilitators: Bitmine AG, Synapse, Verisilicon	Top Bottom
A1 Booster / Coincraft A1www BCT Introduced: 2013-Dec-31 Datasheet: datasheet
Technical specifications Package: Sawn QFN* 12x12mm Markings: (stylized) A1 / [date]-[lot] Known codes: 1312-1,1312-3,1312-6 Die:28nm Foundry: Global Foundries	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 20 0.35 2857 0.65 600 7 33.33 25 0.6 1667 0.765 800 15 31.25 33 1 1000 0.85 1000 33 33
Notes: This chip uses a custom physical pin configuration that should be treated as an LPCC with multiple power pads.
Used on: Bitcoin Ultra Enigma

KnCMiner Sweden AB

KnCMiner Facilitators: ORSoC, Alchip Technologies, Ltd (世芯电子), Accel Partners	Top Bottom Layout Die (detail) Engine
Jupiterwww BCT Introduced: 2013-Oct-05 Datasheet: infosheet: infosheet pinout (full datasheet upon purchase)
Technical specifications Package: FClBGA2797 55x55mm Markings: KnCMiner logo / OCTTNC-AJMMS-007 / [lot] / [lot2] / [date] Known codes: T6A273.00 / T6A27300-2 / 13/39, T6A273.05 / T6A27305-1 / 13/39 Die:28nm(standard cell) Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 130 1.484 674 0.9155 677 192.9 192.02
Notes: Need a more solid date than 'November 2013'
Used on: KnCMiner Mercury/Saturn/Jupiter

KnCMiner Facilitators: Alchip Technologies, Ltd (世芯电子)	Top
Neptunewww BCT Introduced: 2014-Jun-17
Technical specifications Package: FClBGA2797 55x55mm Markings: Die:20nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 684 0.57 1754 0.7 475 389.88 1440

KnCMiner Solarwww BCT Facilitators: Alchip Technologies, Ltd (世芯电子), Ltd Introduced: 2015-Feb-03	No pictures available Die:16nm Foundry: TSMC
Needs more information (see notes for details)	Mining: 0.07J/Gh
As this chip is claimed to exist by a reputable party (KnCMiner AB), the information in this template requires expansion.

Land Asic

Land Asic Facilitators: Bitcoin Development Ltd.	Top Bottom
LDS600www BCT Introduced: 2013-Jul
Technical specifications Package: QFN48 7x7mm Markings: none Die:5x5mm@150nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.6 0.02 10125 0.63 0.03 10631.25 2.439 410 2.927 342
Notes: Package size is an estimate based on neighboring components.

Land Asic Unknownwww Introduced: 2013-Nov	No pictures available Package: QFN100 Markings: none Die:55nm
	Mining: 2Gh/s 2.5J/Gh, 2.5Gh/s 3J/Gh

LK Group

LK Group Limitedwww UnknownBCT a 14nm chip . Plans for this chip have been announced but it has not yet been manufactured. Any specifications are highly subject to change.

SFARDS

SFARDS	Top Bottom
SF3301 BCT Introduced: 2015-Mar-10 Datasheet: datasheet github repository
Technical specifications Package: FCBGA529* 19x19mm Markings: SF3301-FC481 / Q502043[date]2M Known codes: 1513 Die:10.56x10.52mm@28nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 36 0.305 3279 0.6 225 10.98 160 0.32 889.22 100 0.536 1866 0.8 625 53.6 160 0.9 2470.04 72 0.323 3093 0.6 450 23.28 160 0.65 1778.43 152 0.64 1563 0.8 950 97.28 160 1.37 3754.46
Notes: This chip can perform SHA256(d) and Scrypt calculations. The performance figures are strictly for the SHA256(d) portion. Die size is silicon area (10.56x10.52mm) Date is tape-out date. See also: GridChip, GridSeed.

Spondoolies-Tech LTD

Spondoolies-Tech LTD Facilitators: Global UniChip, FlexTronics	Top Bottom (mockup)
Hammer BCT Introduced: 2014-Mar-19 Datasheet: datasheet
Technical specifications Package: Sawn QFN68 8x8mm Markings: spondooliestech / Hammer A0 / [lot] / [date] Known codes: P6P698.08A-1E / 1409, P6P698.00A-1E / 1408 Die:40nm(custom+auto) Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 6.5 0.538 1857 0.6 430 3.5 15.12 7.5 0.6 1667 0.65 500 4.5 15 7.5 0.58 1724 0.63 4.35 8.3 0.651 1537 0.7 550 5.4 15.09
Notes: The datasheet mentions further core frequencies of 225MHz through 660MHz which would yield 3.38Gh/s and 9.9Gh/s respectively, but are not explicitly specified.

Spondoolies-Tech LTD Facilitators: Global UniChip,FlexTronics	Top Bottom Layout Engine
RockerBoxwww BCT Introduced: 2014-Jul-22 Datasheet: product brief (full datasheet behind NDA)
Technical specifications Package: FCBGA480 19x19mm Markings: spondooliestech /RockerBox[lot1] / [lot2] / [date] Known codes: n/a / T8A970.00K-1E / 1429, F20 / TAG896.00K-1 / 1442, F20 / TAM564.00K-1 / 1445 Die:10x11.5mm@28nm(custom+auto) Foundry: foundry	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 174 0.316 3164 0.6 900 55 193.33 1.51 4151.79 190 0.34 2941 0.63 984 64.6 193.09 1.65 4533.57 212 0.425 2356 0.7 1100 90 192.73 1.84 5058.5
Notes: This is a die shrink of the Hammer.. Tape-out was May 14th 2014. The product brief mentions further core frequencies of 500MHz and 1500MHz which would yield 96.5Gh/s and 289.5Gh/s respectively, but are not explicitly specified.

Spondoolies-Tech LTD PickAxeBCT a 2014-Oct 28nm 800Gh/s 0.1J/Gh chip . Ghash performance based on stated power consumption and power efficiencyPickAxe was slated for Q4 2014 with tape-out reported to be in October 2014. As of 26 March 2015 (2015 -03-26), no new information has been presented.

Spondoolies-Tech LTD MattockBCT . Mattock was mentioned in the BitcoinTalk thread, but it is uncertain if it is/was to be a (Bitcoin) ASIC.

TMR

TMRwww	Top
Unknownwww BCT Introduced: 2013-Jun-28
Technical specifications Package: Sawn QFN56 7x7mm Markings: none Die:153nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.144 1.625 615 0.23359375

TMRwww UnknownwwwBCT a 2013-Sep-23 110nm 0.313Gh/s 2.5J/Gh chip .

TMRwww Unknownwww a 2014-Feb 55nm 2Gh/s 0.9J/Gh chip . Intended to be package, pin and protocol compatibe with the TMR's 110nm offering.TMR sought venture capital for development of a 55nm chip, but As of 1 April 2015 (2015 -04-01) no further information has become available.

Canceled projects

back to: top

The following is a list of projects that are known or confidently presumed to have been canceled prior to production.

bASIC

bASIC unknownwwwBCT a 2012-Sep-03 90nm 4.5Gh/s 6.413J/Gh chip co-developed with BTCFPGA. This project was effectively canceled on January 9th, 2013

BTCMinerz

BTCMinerz	Layout Layout
SuperMiner 2.0 BCT Planned: 2013-Sep-23 Canceled (see notes for details)
Technical specifications Die:3.3x2.5mm@55nm Foundry: SMIC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 1.4 0.93 1075 0.9 350 1.302 4 0.17 3529.17
Notes: Die size is approximate based on 8.2mm² die area and assumed die aspect ratio. Presumed to have been canceled prior to production.

DeepBit

DeepBit ReclaimerBCT a 2012-Sep-10 chip . This project was declared canceled on April 8th 2013

helveticoin

helveticoin UnknownBCT a 2012-Oct 28nm 64Gh/s 0.078J/Gh chip co-developed with STMicroelectronics. Date is claimed tape-out date. Gh/s performance is based on claimed clock frequency and number of hashing engines. Claimed to incorporate / be built around an ARM Cortex M3 core.Presumed to have been canceled prior to production or to have been a ruse given claims.

LargeCoin

LargeCoin UnknownBCT a 2012-Jul chip . Presumed to have been canceled prior to production.

Marchenko Ltd

Marchenko Ltd unknownBCT a 2012-Apr-04 chip . Project was cancelled on July 12th, 2012

Novello Technologies

Novello Technologies unknownwwwBCT a 2014-Jun-03 40nm 128Gh/s 0.195J/Gh chip . Die size is an estimate based on a stated chip size of 100mm²Project was put on indefinite hold on June 12th, 2013

OpenBitASIC

OpenBitASIC unknownBCT a 2012-Apr-12 chip . Project was canceled on April 14th, 2013

papa moi

papa moiwww Facilitators: Brite Semiconductor, ChipMotion Microelectronics Co, Ltd.	Layout
Unknownwww BCT Planned: 2013-Nov-27 Canceled (see notes for details)
Technical specifications Package: QFN Markings: Die:65nm Foundry: SMIC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.7 0.78 1.20 1 1.55 1 1000
Notes: Date is tape-out-ready date. Project appears to have been canceled, no new information since December 12th, 2013. Developer's behavior became erratic.

Xcrowd

xCrowd Terra One / Z1wwwBCT[media: a ] a 2013-Jul-02 40nm 15Gh/s 1.667J/Gh chip . Listed as both Z1 and Terra OnePresumed to have been canceled prior to production.

Questionable projects

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The following is a list of projects that were not formally canceled and are generally presumed to have been dishonest in their presentation of the existence / performance / depiction of the chip and/or the company.

Note: Most links below will lead to external sites. Icons have been surpressed to prevent link clutter.

• Achilles Labs^www Unknown^BCT a 2014-Nov 28nm 0.63J/Gh chip . Despite claims of available hardware currently being sold, no information on this hardware has become available.
• Alydian^www Unknown^BCT a 2013-Aug-07 65nm chip co-developed with CoinLab. Claimed to have been pursuing their own chip according to Jeff Garzik. Alydian filed for Chapter 7 bankruptcy on November 1st, 2013, only 3 months after being founded by CoinLab. As part of their bankruptcy proceedings, asset auctions were blocked as the judge believed to be dealing with "a debtor that has absolutely zero existence"
• ASICrigs^www Unknown^{BCT[media: a ]} a 2013-Apr-13 chip co-developed with ON Semiconductors. Used manipulated images of Butterfly Labs miners and manipulated image of a Fujitsu ARM chip to bolster credibility.
• ASX Project^www Unknown^{BCT[media: a ]} a 2013-Apr-27 0.25Gh/s chip . Used manipulated (blurred) image of a Texas Instrument-manufactured Apple QuickDraw3D ASIC to bolster credibility.
• Axon Labs^www sorenson cortex 1^{wwwBCT[media: a ]} a 2013-Dec-18 375Gh/s 0.45J/Gh chip . Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales.
• Bitcoin Brothers^www Unknown^BCT a 2013-Feb 45nm chip . A chip at this node size was only claimed to have been designed, no claim was made regarding production.
• Bitcoin Brothers^www Unknown^{[media: a ]} a 2014-Apr 20nm 13Gh/s 0.45J/Gh chip . As of 1 April 2015 (2015 -04-01) no information on the existence of this chip has been made public.
• Bitcoin Brothers^www Unknown^BCT a 2015-Feb 16nm 23.438Gh/s 3.516J/Gh chip . As of 1 April 2015 (2015 -04-01) no information on the existence of this chip has been made public.
• BitHashMiner Unknown^BCT a 2015-Apr 20nm 400Gh/s 0.14J/Gh chip . This chip was slated for the future, however there were strong indications of dishonesty in their presentation and (pre)sales.
• Boscombe Pierlytic^www Unknown^BCT a 2013-Dec-10 28nm chip . Date is first appearance of company name (via comment spam)Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales, despite statement to the contrary
• BTC Olympus^www Achilles^BCT . Implied to have been BTC Olympus' first ASIC. Not to be confused with Achilles Labs, a manufacturer of Scrypt mining hardware.Implied to have been canceled due to performance issues.
• BTC Olympus^www Hercules^{BCT[media: a ]} a 2013-Dec-08 28nm 550Gh/s 0.75J/Gh chip . This chip was to be used in a product called the Poseidon, for which at least one BitcoinTalk Forum post exists claiming selling a used unit. However, no details of the unit or chip are available and the company is generally regarded as being dishonest in their business.. As of 27 March 2015 (2015 -03-27), all social media accounts/posts have been closed, and on March 21st, 2015, the first post in the relevant BitcoinTalk Forum thread has been blanked out.
• BTC Olympus^www Unknown^BCT a 2014-Jun 20nm chip . Although a 20nm ASIC was mentioned in passing, no further information is available.
• CedarTec^www Unknown^{BCT[media: a ]} a 2013-Apr-08 65nm 8Gh/s 3.125J/Gh chip . Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales, using manipulated images to bolster credibility.
• CoreMiner Unknown^BCT a 2014-Feb-01 0.7J/Gh chip co-developed with Bits, Inc., Data Converters Ltd.. Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales
• Crypto Technology Systems^www Unknown^BCT a 2014-Jan-21 20nm 1250Gh/s 0.22J/Gh chip . Canceled January 29th, 2014 due to scam allegations and the project being “far too big [,,] to handle”. Used manipulated image of a Handshake Solutions ARM996HS processor to bolster credibility. Pre-orders were refunded, with {{{subst:BTC}}}0.0998 ($8 at the time) unaccounted for.
• Cryoniks, Inc.^www Cryonic ASIC+^BCT a 2013-May-23 32nm chip co-developed with Liquid Nitrogen Overclocking. stringUnknown status, generally presumed to have been dishonest in their presentation and (pre)sales
• DragonCo, Inc.^www Dragon ASIC^BCT a 2013-Apr-04 chip . Not to be confused with Dragon Mining Technology.Used manipulated images of a Godson-1 chip to bolster credibility.
• EMIC (European Mining Innovation Center)^www Unknown^BCT a 2015-Feb 20nm 157Gh/s 0.248J/Gh chip . Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales
• Extolabs Ltd^www P866 BBFE^{wwwBCT[media: a b ]} a 2014-Apr-01 20nm 900Gh/s 0.528J/Gh chip . Date is first appearance of Extolabs online (vimeo video).Used manipulated images of unknown BGA chips to bolster credibility.
• Frank Leejun^www Unknown^wwwBCT a 2014-Jun-17 14nm chip . Unknown status, generally presumed to have been dishonest in their (crowdfunding pitch) presentation. Promotional image actually used a 4xKlondike K16 case design
• GalaxyASIC^www Unknown^BCT a 2013-Oct-28 20nm chip . Unknown status, generally presumed to have been dishonest in their presentation and investment seeking
• German Bitcoin Mining^www Unknown^BCT a 2013-Jul-05 chip . Unknown status, generally presumed to have been dishonest in their presentation using edited images of existing mini-ITX cases, and has gone out of business without any further details on offerings.
• Global Mining Hardware Solutions^www Unknown^BCT a 2013-Aug-31 28nm 15Gh/s 0.7J/Gh chip . Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales
• HashBlaster^www Crimson Peak^{wwwBCT[media: a ]} a 2013-Dec-09 20nm 1100Gh/s 0.55J/Gh chip . Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales using manipulated image of an image that itself was manipulated to remove package markings.
• HashCoins^www Unknown^wwwBCT a 2015-Mar 20nm 400Gh/s 0.26J/Gh chip . Efficiency is as specified at the board.The mining equipment this chip is going to be used in was originally slated for Q1 2015. As of 1 April 2015 (2015 -04-01) the HashCoins website reads that this equipment "is in the stage of testing and certification", while taking orders via Bitcoin and/or bank transfers.
• labcoin (iTec Pro Limited)^www Unknown^wwwBCT a 2013-Jul 180nm 250Gh/s 1.6J/Gh chip . Date was projected tape-out date. Design based on open source FPGA designThis chip was canceled shortly before tape-out
• labcoin (iTec Pro Limited)^www Unknown^{BCT[media: a b c d e ]} a 130nm 4.8Gh/s 2.667J/Gh chip co-developed with SZICC. New work done by the same designer as the 180nm model which was canceled, and claimed to have been 'finished' by another designer.This chip was claimed to have been received, however the image was found to be manipulated which was explained as just being rough chip packaging. Another image with the alleged chip in a tray rather than on a reel was posted accompanied by an infeasible PCB design.
• labcoin (iTec Pro Limited)^www Unknown^BCT a 65nm chip . A 65nm chip was claimed to be under development by labcoin through two teams, referred to only as 'Chinese team' and 'European team'.Work on 65nm chips was acknowledged as having been suspended around October 2013. Generally presumed to have been dishonest in their presentation and investment seeking.
• labs novo^www Unknown^BCT a 2013-Mar-21 4.5J/Gh chip . Used manipulated images of an AC Ryan mediaplayer to bolster credibility.
• Payonix Technologies Pty Ltd^www ONIX^{[www www]BCT} a 2013-Nov-07 28nm 250Gh/s 0.7J/Gh chip . ASIC purportedly 'reverse engineered'.Project went deliberately silent, website no longer mentions hardware and at least on that portion of affairs are presumed to have been dishonest in their presentation and (pre)sales.
• Phoenix Technologies^www G2 X w/ Nanoflow™^BCT a 2013-Aug-06 28nm 250Gh/s 0.65J/Gh chip . Not to be confused with Phoenix Technologies Ltd. of computer BIOS fame.Used manipulated images of G-Technology G-Safe and G-Speed products, is generally presumed to have been dishonest in their presentation and (pre)sales. Company logo is actually that of Phoenix Television
• primeASIC^www Unknown^BCT a 2013 10J/Gh chip . Also known as BitAsic^www. Current BitAsic website suggests a product called Enigma which should not be confused with the Bitcoin Ultra^www Enigma, which used InnoSilicon/Coincraft A1 chips.Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales., used a company's credentials as a facilitator, but that company denied being associated
• Skyward Sword (倚天剑) Unknown^BCT a 2013-Oct 65nm 3.2Gh/s 0.875J/Gh chip . Date is for tech availability.Sought investment/production partners for the design. Unknown status, was met with skepticism at various forums.
• Skyward Sword (倚天剑) Unknown^BCT a 2013-Oct 40nm 8Gh/s 0.35J/Gh chip . Date is for tech availability.Sought investment/production partners for the design. Unknown status, was met with skepticism at various forums.
• Smart Miner^www Unknown^wwwBCT a 2013-Oct-31 40nm 5Gh/s 1.2J/Gh chip . Efficiency is as specified at the board.Little is known about this chip outside of its purported use in hardware that could be rented (early cloudhashing). No page appears to have details (the now-defunct website mentioned a 30-day delay in tape-out), and the validity of the company's claims have been called into question.
• VMC / AMC / ActM^www Fast-Hash ONE^wwwBCT a 2013-Dec 45nm 6Gh/s chip co-developed with eASIC. The name 'Fast-Hash ONE' was eventually used to refer to HashFast chips integrated into AMC/VMC miners.AMC/VMC announced that they were skipping their 45nm technology.
• VMC / AMC / ActM^www Fast-Hash ONE^wwwBCT a 2013-Nov 28nm 16Gh/s 0.696J/Gh chip co-developed with eASIC/unspecified. The name 'Fast-Hash ONE' was eventually used to refer to HashFast chips integrated into AMC/VMC miners.Although never formally canceled, this chip never materalized before AMC/VMC's legal troubles in February of 2015.
• VMC / AMC / ActM^www Fast-Hash ONE^wwwBCT a 2014-Apr-17 55nm 1.9Gh/s 1.316J/Gh chip co-developed with People's ASIC. The name 'Fast-Hash ONE' was eventually used to refer to HashFast chips integrated into AMC/VMC miners.AMC/VMC announced in a media interview that their 55nm technology had been canceled
• Xtreme Miners^www Unknown^{BCT[media: a ]} a 2014-Feb 28nm 0.3J/Gh chip . Unknown status, generally presumed to have been dishonest in their presentation and (pre)sales.
• ZTE-Asic^www Unknown^BCT a 2013-Aug-28 20nm chip . Not to be confused with ZTE Corporation of telecom fame.Used manipulated images of Synology NAS solutions to bolster credibility. Generally presumed to have been dishonest in their presentation and (pre)sales.

External links

• video about the technological aspects of custom processor design
• article about the economical aspects of custom processor design