Template:Asic/sandbox

ASICMiner

ASICMiner Facilitators: BitQuan,BitFountain	Top Bottom
BE100 BCT Introduced: 2012-Dec-28
Technical specifications Package: Sawn QFN40 6x6mm Markings: BE100 Die:4.66x4.66mm@130nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.336 6 167 1.05 336 2.016 1 0.02 4249.2 0.392 8 125 1.15 392 3.136 1 0.02 4957.4
Notes: The letters 'BE' in the component name/markings stands for "Block Erupter". ASICMiner considers the BE100 their 'Gen1' product.
Used on: Block Erupter USB, Block Erupter Cube, Block Erupter Blade

ASICMiner unknown BCT Facilitators: BitQuan,BitFountain Planned: 2012-Nov	No pictures available Die:65nm
Canceled (see notes for details)
Notes: This chip would formally have been ASICMiner's 'Gen2' product. Development appears to have been canceled prior to production.

ASICMiner Facilitators: BitQuan,BitFountain	Top (8x8mm) Bottom (9x9mm)
BE200www BCT Introduced: 2014-Mar-28 Datasheet: package dimensions,pins/protocol, pinout
Technical specifications Package: Sawn QFN64 8x8mm Markings: BE200 / [lot] Known codes: lot:8P01N,9C01H,9P02A,9P02H Die:40nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 9.6 0.66 1515 0.8 6.336
Notes: ASICMiner considers this their 'Gen3' product. Was made available in 8x8mm and 9x9mm packages.
Used on: ASICMiner Tube, ASICMiner Prisma

ASICMiner Facilitators: BitQuan,BitFountain	Top Layout
BE300S prototype BCT Introduced: 2014-Sep-16
Technical specifications Package: Sawn QFN40* Markings: BE300S Die:28nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 3 0.187 5342 0.5616 5.2 0.247 4050 1.28388
Notes: This was a prototype manufactured on an MPW. The package appears to be soldered on only 2 sides, which may imply that internally there are also only bond wires to those two sides.

ASICMiner BE300(S) BCT Facilitators: BitQuan,BitFountain Planned: 2015-Feb	No pictures available Package: FCLGA 5x5mm Die:28nm Foundry: TSMC
May not actually exist (see notes for details)	Mining: 8Gh/s 0.038J/Gh, 12Gh/s 0.038J/Gh, 6Gh/s 0.033J/Gh, 9Gh/s 0.022J/Gh
Notes: ASICMiner would consider this their 'Gen4' product. The expected hashing performance and package size is preliminary. The BE300(S) is understood not to be in production at this time.

ASICMiner Unknown Facilitators: BitQuan,BitFountain Planned: 2015	No pictures available Die:16nm
Future (see notes for details)
Notes: The planned node size would be 16nm or 14nm This chip is planned to be introduced in the future.

Avalon Project

Avalon Project Facilitators: Canaan Creative, BitSynCom	top bottom Layout Die (power) Die (cores)
A3256www BCT Introduced: 2013-Jan-20 Datasheet: datasheet, package
Technical specifications Package: Sawn QFN48 7x7mm Markings: Old Avalon logo / A3256-Q48 / [lot/date] Known codes: P6M56213042C,P6M56313052C,PP787813212 Die:3.976x4.056mm@110nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 0.295 6.6 152 1.15 375 1.947 0.79 0.02 3043.45
Notes: First ASIC to be put to market, with first delivery of a miner to Jeff Garzik.

Avalon Project Facilitators: Canaan Creative, BitSynCom	Top
A3255www BCT Introduced: 2013-Aug Datasheet: datasheet, package
Technical specifications Package: Sawn QFN48 7x7mm Markings: Avalon logo / A3255-Q48 / [lot/date] Known codes: SKWL0613452CMU Die:55nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 1.5 1.6 625 0.8 750 2.4 2 1.5 2.45 408 1.0 750 3.675 2

Avalon Project Facilitators: Canaan Creative, BitSynCom	Top Bottom
A3233www Introduced: 2014-Apr Datasheet: datasheet, package
Technical specifications Package: Sawn QFN48 7x7mm Markings: Avalon logo / A3233-Q48 / [lot/date] Known codes: P6P73914092CMU,P6P73914102CAL Die:40nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 7.08 0.75 1333 0.55 600 5.31 11.8 7.08 0.89 1124 0.89 600 6.3012 11.8

Avalon Project Facilitators: Canaan Creative, Alchip Technologies, Ltd	Top
A3222www BCT Introduced: 2014-Sep Datasheet: datasheet, package
Technical specifications Package: Sawn QFN56 8x8mm Markings: Avalon logo / A3222-Q56 / [lot/date] Known codes: T8A98911434EMAA,T4V9181435ECLA Die:28nm Foundry: TSMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 25 0.4 2500 0.65 400 10 62.5 25 0.6 1667 0.8 400 15 62.5

BitFury Group

BitFury Group Facilitators: IMEC,Europractice,BioInfoBank Institute	Tops/Bottom Layout Layout Die (optical) Die (power) Die (cores)
BF756C55www BCT Introduced: 2013-Jun-14 Datasheet: datasheet package pinout compilation
Technical specifications Package: Sawn/Punched QFN48 7x7mm Markings: β: β / 5Ghash / [date] / [lot] / TT BioInfoBank: BioInfoBank logo / BIB756C55NM-BF / [date] / [lot] CCCP: CCCP logo / CCCP756C55NM-BF / [date] / [lot] Known codes: β: KRT8G, BioInfoBank: 1336/KYG0H, 1404/KCKCL, CCCP: 1340/KYW3Q Die:3.8x3.8mm@55nm(full custom+global place&route) Foundry: UMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 5.43 0.38 2632 0.687 467 2.0634 11.63 0.38 7820.43 4.77 0.35 2857 0.65 410 1.6695 11.63 0.33 6869.88 3.26 0.25 4000 0.545 280 0.815 11.64 0.23 4695.14 2.5 0.21 4762 0.5 216 0.525 11.57 0.17 3600.57
Notes: BitFury Group considers this their Gen 1, Rev 1 product. It was originally designed at 65nm but die-shrunk down to 55nm. It was widely released in at least 3 different packages/markings: The 'beta' / 5Ghash (estimated hash rate before practical tests) markings on a sawn package, BioInfoBank and CCCP markings on a punched package. BitcoinTalk user vs3 holds a large collection of technical information about this chip in his NanoFury repository

BitFury Group Facilitators: IMEC,Europractice	Top Bottom
BF864C55www BCT Introduced: 2014-Mar-03
Technical specifications Package: Punched QFN48 7x7mm Markings: BitFury Logo / BF864C55 / [lot] Known codes: KCYLT,KCTMS Die:55nm(full custom) Foundry: UMC	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 3.8 0.5 2000 0.5 1.2
Notes: BitFury Group considers this their Gen 1, Rev 2 product. This chip is pin- and protocol-compatible with the BF756C55, allowing many existing designs based on the BF756C55 to be upgraded.

BitFury Group Unknown BCT Introduced: 2015-Feb-28	No pictures available Die:28nm (full custom)
Needs more information (see notes for details)	Mining: 0.2J/Gh
Notes: BitFury Group considers this their Gen 4 product.. No information is available on what their 'Gen 3' product may have been, or whether the earlier 'Gen 1 Rev 2' is to be seen as 'Gen 2'. BitFury Group have stated that they will not be making chip samples or details available. As this chip is claimed to exist by a reputable party (BitFury Group), the information in this template requires expansion.

BitFury Group Unknown No introduction date known	No pictures available Die:16nm (full custom)
Future (see notes for details)	Mining: 0.06J/Gh
Notes: BitFury Group considers this their Gen 5 product. This chip is planned for the future and specifications are highly subject to change.

Bitmain Technologies Ltd.

Bitmain Technologies Ltd.	Top Top Bottom
BM1380www BCT Introduced: 2013-Nov-11 Datasheet: datasheet
Technical specifications Package: Sawn QFN56 8x8mm Markings: Blank: n/a Common: Antminer logo / BM1380 / [lot/date] Known codes: U02014G7 Die:3.464x3.464mm@55nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 1.6 0.667 1500 0.75 196 1.067 8.16 0.13 2773.08 2 0.847 1181 0.85 1.694 0.17 3466.35 2.5 1.128 886 1.00 2.821 0.21 4332.94 2.8 1.32 758 1.10 325 3.695 8.62 0.23 4852.89
Notes: Bitmain considers this their 'Gen 1' product.

Bitmain Technologies Ltd.	Top Bottom (mockup)
BM1382www BCT Introduced: 2014-Apr Datasheet: datasheet
Technical specifications Package: Sawn FCQFN56* 8x8mm Markings: Antminer logo / BM1382 / [lot/date] Known codes: A100114w1 Die:28nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 14.18 0.528 1893 0.72 225 7.49 63.02 17.33 0.702 1425 0.80 275 12.16 63.02 6.3 100 63 25.2 400 63
Notes: Bitmain considers this their 'Gen 2' product. This chip uses a custom physical pin configuration that should be treated as a QFN with multiple exposed pads.

Bitmain Technologies Ltd.	Top Bottom (mockup)
BM1384www BCT Introduced: 2014-Sep Datasheet: datasheet
Technical specifications Package: Sawn FCQFN32* 8x8mm Markings: Antminer logo / BM1384 / [lot/date] Known codes: A10014o1 Die:28nm	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 8.25 0.249 4009 0.60 150 2.058 55 15.125 0.354 2823 0.72 275 5.357 55 22 0.448 2234 0.80 400 9.848 55
Notes: Bitmain considers this their 'Gen 3' product. This chip uses a custom physical pin configuration that should be treated as a QFN with multiple exposed pads.

Black Arrow

Black Arrow Ltd Facilitators: Verisilicon	Top Bottom (mockup) Layout
Minionwww [bct BCT] Introduced: 2014-Apr-10 Datasheet: datasheet footprint
Technical specifications Package: MCM UFCBGA900 25x25mm Markings: Black Arrow logo / Black Arrow LTD / MINION / 99s256 / [date] / [lot] Known codes: 1418 UXYL09065.000 Die:28nm Foundry: Global Foundries	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 99 0.85 1000 99 118.8 0.85 1200 99 50 0.5 2000 25 1.01
Notes: string

Black Arrow Ltd Unknown Planned: 2015-May	No pictures available Die:14nm Foundry: Global Foundries
Future (see notes for details)	Mining: 0.3J/Gh
Notes: Tape-out was purportedly in December 2014 This chip is slated for the future.

Butterfly Labs, Inc.

Butterfly Labs, Inc. Facilitators: Chronicle Tech (now Custom Silicon Solutions)	Tops/Bottom Layout Die Die (detail)
BitForce SCwww BCT Introduced: 2013-Feb-08 Datasheet: datasheet(alt) protocol(alt)
Technical specifications Package: FCBGA144 10x10mm Markings: Blank:n/a ButterFly Labs Logo / BUTTERFLYLABS / BFSC100F144 / US10 / [lot] [date] Known codes: 6770 3013,1393 3513 Die:7.5x7.5mm@65nm(full custom) Foundry: Global Foundries/IBM	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 4.2 2.857 350 12 0.07 2563.17 4 3.2 313 1.0 250 12.8 16 0.07 2441.11
Notes: ASIC based on their FPGA design. The first publicly known to exist Bitcoin ASIC.

Butterfly Labs, Inc.	Top
Monarch BCT Introduced: 2014-Aug-21
Technical specifications Package: FClBGA1020 23x23mm Markings: Butterfly Labs logo / BFSC28NM02 2006 / FPBGA1188 [date] / [lot?] Known codes: 2614 Die:28nm Foundry: Global Foundries	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 400 0.27 3704 108 600 0.39 2564 234 1000 0.55 1818 550 1600 0.76 1316 1216
Notes: Package size is an estimate.

CoinTerra, Inc.

CoinTerra, Inc. Facilitators: Open-Silicon	Top Top Layout (1 die)
GoldStrike 1www BCT Introduced: 2013-Nov-08 Datasheet: infosheet, presentation presentation video
Technical specifications Package: QMCM FCBGA1296 37.5x37.5mm Markings: Q1 only: COINTERRA / GoldStrike 1 / [lot] / [date] TAIWAN Q1-4: COINTERRA / GoldStrike 1 / [lot] / [date] TAIWAN Known codes: Q1:UOLK46001B10 1352, Q1-4: UOLL04004.01A 1403, UOLK46006.01A 1403 Die:20x10mm@28nm Foundry: Global Foundries Dresden	Gh/s J/Gh Mh/J V MHz W h/Hz Gh/mm² η-factor 504 342 3 0.7 1400 172368 360 2.52 6914.88 720 2000 360 3.6 9878.4
Notes: Although the MCM package shows 4 dies, various documentation suggests only 3 are active silicon. Die size is thus an estimate based on 2*10x10mm

CoinTerra, Inc. SHIVAwww BCT Facilitators: Global Unichip Corp Planned: 2014-Sep-18	No pictures available Die:16nm
Canceled (see notes for details)	Mining: 0.225J/Gh
Assumed not to have gone into production before CoinTerra's Chapter 7 Bankruptcy.