Avalon2: Difference between revisions
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* You may need update the address/DNS to your local configuration. DO NOT FORGET your IP address. | * You may need update the address/DNS to your local configuration. DO NOT FORGET your IP address. | ||
* If Rpi can access internet the cgminer should automatic start | * If Rpi can access internet the cgminer should automatic start | ||
* USB Hub | * USB Hub, [http://item.jd.com/511117.html jd.com] | ||
= [[Avalon2 prototype]] = | = [[Avalon2 prototype]] = | ||
Revision as of 13:44, 6 February 2014
Avalon2 is the second machine of Avalon project. using the 55nm ASIC chips
Pictures
PCB
Single modular
Avalon2 parts
Avalon2
A3255
Hardware design documents
Single Modular
Module hash speed: ~105GHS Chip operating speed: 1.5GHS Chip working voltage: 1.0V Typical values DH: ~2% Module Power: 24.5A@12V, 294W (excluding fan power consumption). 0.1A @ 5V, 0.5A @ 3.3V. Power Module conversion efficiency: >= 87% Design Operating temperature: 85C (chip temperature), 60C (PCB, temperature sensor measurements) Fan: 4PIN PWM speed control, report fan speed back. Include: Single modular, USB Connector (NOTICE: DON'T INCLUDE POWER AND CABLES)
The Avalon2
315GH/s, 1020W@220V in normal mode. 210GH/s, 420W@220V in ECO mode.
Firmware
Source code
- https://github.com/BitSyncom/mm/ #For the module FPGA firmware
- https://github.com/BitSyncom/cgminer/tree/avalon2 # The cgminer
- https://github.com/BitSyncom/luci/tree/cgminer-webui-avalon2/applications/luci-cgminer # OpenWrt LUCI page
- https://github.com/BitSyncom/cgminer-openwrt-packages # OpenWrt cgminer package, files and config
- https://github.com/BitSyncom/avalon-extras/blob/master/scripts/build-avalon-image.sh # Build script file
20140123
- Include the first stable version of MM firmware
- Include the RPi OpenWrt firmware with LUCI web UI configure/status page
- Support static Fan speed
- Display all modulars status include 2 fan, 2 temperature sensors, voltage and frequency
- Voltage display as encode mode. needs to be changed to human readable
- Upload the ASIC cores testing script file
MM
Source code is here: https://github.com/bitsyncom/mm
Host(OpenWrt + Cgminer)
TP LINK WR703N
The USB on the AR9331 have bugs. if you want use serial console, please the direct serial console on 703N (the /dev/ttyATH0). it's far more stable then USB-serial convertor.
Raspberry Pi
- 8GB Memory card: http://item.jd.com/632744.html
- Reflash: sudo dd if=openwrt-brcm2708-sdcard-vfat-ext4.img of=/dev/sdb bs=4M #/dev/sdb is your memory card
- The default firmware IP address is 192.168.0.100, you can access it by http://192.168.0.100
- You may need update the address/DNS to your local configuration. DO NOT FORGET your IP address.
- If Rpi can access internet the cgminer should automatic start
- USB Hub, jd.com
Avalon2 prototype
This design is use the Avalon first product design, replace the A3256 with A3255, some hardware pins modify and use different FPGA firmware. please check here for details and all design files and firmware files.
There are some 55nm Open Design files for you.
Donation
- Ngzhang0: 1kBGUHDxmSAegACRB6fcE2vrnVAfPJarW
- Con Kolivas: 15qSxP1SQcUX3o4nhkfdbgyoWEFMomJ4rZ
- Kanoi: 1KanoiBupPiZfkwqB7rfLXAzPnoTshAVmb
- Xiangfu: 19BT2rcGStUK23vwrmF6y6s3ZWpxzQQn8x
Links
- 55nm open design contest: http://avalon-asics.com/avalon-gen2-55nm-open-source-design-contest/
- Documents release by Avalon: http://downloads.canaan-creative.com/hardware/A3255/