Avalon2: Difference between revisions
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Avalon2 is the second machine of Avalon project. using the 55nm ASIC chips | Avalon2 is the second machine of Avalon project. using the 55nm ASIC chips | ||
= Chip sales agent = | |||
== China mainland（中国大陆地区代理） == | |||
深圳阿瓦龙电子有限公司 | |||
淘宝：http://avalon8.taobao.com/ | |||
联系人：陈先生 | |||
电话：0755-36820585 | |||
手机：13528785811 | |||
== World wide == | |||
ELEN Technology Limited., | |||
Contact: Eric Chen | |||
Address: Rm.,604,Treasure Center, 42 Hung To Road, Kwun Tong, Kln. HongKong | |||
FAX:+(852)30071717 | |||
= Prototype = | = Prototype = | ||
Revision as of 18:14, 10 November 2013
Avalon2 is the second machine of Avalon project. using the 55nm ASIC chips
Chip sales agent
China mainland（中国大陆地区代理）
深圳阿瓦龙电子有限公司 淘宝：http://avalon8.taobao.com/ 联系人：陈先生 电话：0755-36820585 手机：13528785811
World wide
ELEN Technology Limited., Contact: Eric Chen Address: Rm.,604,Treasure Center, 42 Hung To Road, Kwun Tong, Kln. HongKong FAX:+(852)30071717
Prototype
Firmware
TIMEOUT
- TIMEOUT的有效值范围为[0,255]，FPGA controller根据TIMEOUT的配置来控制申请/计算任务的时间。当TIMEOUT值配置为1时，FPGA controller会每隔0.033s申请一次任务，也表示芯片已计算完当前HASH区间。
- TIMEOUT配置与申请/计算任务时间间隔的公式为
TIME_OF_MINER_FINISH_HASH_RANGE = TIMEOUT * 0.033s TIMEOUT = TIME_OF_MINER_FINISH_HASH_RANGE / 0.033s
- 若FPGA controller连接的一个小模块上的计算能力为10GHs（10个芯片，每芯片1G），则FPGA controller申请任务的时间间隔为
2^32 / 10*1000*1000*1000 = 0.4s 0.4s/0.033s = 12 # TIMEOUT应配置为12
2013-11-08
- 8, 16 miners works just fine
- ISSUE: 24, 32 miners still not working
- Both 703n firmware and FPGA controller firmware have uploaded
- Change `core_count to 64 to compatible with ealier cgminer
- Software should follow equation below when handle A3255 based miner
nonce_send_to_pool = nonce_receive_from_miner-0xc0
2013-11-05
- Support 8, 16 miners, 8 and 16 have tested
- ISSUE: 24, 32 miners not working
- Upload the 703n firmware
- Upload the FPGA controller firmware
- Support 6 ~ 10 chip in each miner, 6 and 10 have tested
2013-10-07
- Only support 16 miners, each miner have 6 A3255 ASICs