HashFast Technologies
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HashFast Technologies is an ASIC mining hardware designer and retailer.
Bankruptcy
On May 9th, 2014, a petition was filed against HashFast Technologies for involuntary Chapter 7 bankruptcy.
On June 3rd, 2014, HashFast Technologies filed to have the bankruptcy converted to Chapter 11.[1]
On July 29th, 2014, a blog post noted that they were selling off assets in bulk.[2]
No updates have been posted since August 12th, 2014[3]
Bankruptcy proceedings notes on HashFast's technology
| item | reference | relevant quote |
|---|---|---|
| Golden Nonce 1 | [1] p8 | The Intellectual Property purportedly held by HF is primarily related to the Golden Nonce chip." (HF here refers to HashFast, LLC. A company set up to handle IP and design, effectively for HashFast Technologies, LLC which would handle business relations, sales and other non-IP matters. |
| Golden Nonce 1.5 | [2] p200 | "I understand that there were generation 1.5 -Right." |
| Golden Nonce 2 | [3] p200 | "I understand that there were generation [...] 2 -Yes." |
| Golden Nonce 3 | [4] p201 | "I understand that there were generation [...] perhaps 3 -Yes." (unfounded) |
| Uniquify involvement with Golden Nonce 1 | [5] p44 | "Uniquify was doing the design and production of the chips." |
| Signetics involvement with Golden Nonce 1 | [6] p180 | "Signetics, who is the actual producer, assembler of the chips. They are subcontracted through Uniquify. |
| Sandgate involvement with Golden Nonce 1 | [7] p226 | "I know Sandgate was involved in some of the design" |
| DXCorr involvement with Golden Nonce 1.5 | [8] p204 | "DXCorr [...] had the rights to the generation 1.5 chip -Yes." |
| DXCorr involvement with Golden Nonce 2 | [9] p44 | "DXCore was doing the design of the future next generation chip." |
| TSMC contract | [10] p209 | "They're concerned because of the three-way confidentiality with TM&C [sic]." |
| Golden Nonce node size | [11] p206 | "the 16-nanometer chip, which was generation 2" |
| Golden Nonce 1.5 initiation | [12] p212 | "Because the work was stopped on 2.0 and supposed to have been restarted on 1.5." |
| Golden Nonce 2.0 cancellation | [13] p211 | "Because the work was stopped on 2.0 and supposed to have been restarted on 1.5." |
| Golden Nonce 1.5 cancellation | [14] p218 | "DXCorr stopped having verbal communications with us when the bankruptcy proceedings occurred and wanted to only communicate a resolution of claim by e-mail, which we have not done." |
| start date for Golden Nonce 1 design | [15] p8 | "In or about June 2013, the Debtors began designing their first generation Golden Nonce (“GN1”)" |
| start date for Golden Nonce 2 design | [16] p3 | "August 21, 2013" |
| start date for Golden Nonce 1.5 design | [17] p4 | "December 1, 2013" |
| IP owner for Golden Nonce 1 | [18] p8 | The Intellectual Property purportedly held by HF is primarily related to the Golden Nonce chip." |
| IP owner for Golden Nonce 1.5 | [19] p8 | "The ownership of the intellectual property related to the GN1.5 (the “GN1.5 IP”) is uncertain." |
| IP owner for Golden Nonce 2 | [20] p8 | "the GN2 IP is owned by DXC." |
| patent on stacked chip | [21] p6 | "stacked chips application (#61917828, acknowledged as received on 12/18/13) lists Simon Barber as the inventor and the Parent as the assignee." |
| patent on Golden Nonce protocol | [22] p6 | "protocol application, (#61896559, acknowledged as received on 10/28/13) lists Adrian Port as the inventor and the Parent as the assignee." |
| patent on Golden Nonce protocol | [23] p202 | "there is the two patents. One is the stacked chips and the other is the Golden Nonce interface protocol" |