BFGMiner: Difference between revisions

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Luke-jr (talk | contribs)
ASIC update
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A modular FPGA, GPU and CPU miner written in C, cross platform for Linux, Mac, and Windows including support for OpenWrt-capable routers.
A modular ASIC, FPGA, GPU and CPU miner written in C, cross platform for Linux, Mac, and Windows including support for OpenWrt-capable routers.


==Features==
==Features==
* A variety of device drivers for Bitcoin (SHA256d):
* A variety of device drivers for Bitcoin (SHA256d):
** [http://www.butterflylabs.com/bitforce-sc-release-notes/ Butterfly Labs's BitForce SC (ASIC) product line]
** [http://launch.avalon-asics.com/ Avalon ASIC mining rig]
** [http://www.butterflylabs.com/product-details/ Butterfly Labs's BitForce Singles and MiniRigs]
** [http://www.butterflylabs.com/product-details/ Butterfly Labs's BitForce Singles and MiniRigs]
** [http://www.enterpoint.co.uk/cairnsmore/cairnsmore1.html Enterpoint's Cairnsmore1 FPGA mining board]
** [http://www.enterpoint.co.uk/cairnsmore/cairnsmore1.html Enterpoint's Cairnsmore1 FPGA mining board]
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** CPU (not enabled by default nor included in Windows build)
** CPU (not enabled by default nor included in Windows build)
** Coming soon:
** Coming soon:
*** [http://www.butterflylabs.com/bitforce-sc-release-notes/ Butterfly Labs's BitForce SC (ASIC) product line]
*** [https://bitcointalk.org/?topic=99497 ASICMINER ASICs]
*** [https://bitcointalk.org/?topic=99497 ASICMINER ASICs]
*** ''any other device provided for development''
*** ''any other device provided for development''

Revision as of 09:32, 6 March 2013

A modular ASIC, FPGA, GPU and CPU miner written in C, cross platform for Linux, Mac, and Windows including support for OpenWrt-capable routers.

Features

  • A variety of device drivers for Bitcoin (SHA256d):
  • Support for new getblocktemplate decentralized mining protocol
  • Scrypt mining support for both CPU and OpenCL (GPU)
  • Very low overhead free C code for Linux and Windows with very low CPU usage
  • Long poll support - will use longpoll from any pool if primary pool does not support it
  • epoll support for interrupting FPGA waiting when new work is available without timeout-looping
  • Self detection of new blocks with a mini-database for slow/failing longpoll scenarios, maximum work efficiency and minimum rejects
  • Heavily threaded code hands out work retrieval and work submission to separate threads to not hinder devices working
  • Caching of submissions during transient network outages
  • Preemptive fetching of work prior to completion of current work
  • Local generation of more valid work (rollntime) whenever possible, as supported on a per-work item basis
  • Prevention of stale work submission on new block (submitold also supported)
  • Automatically detects failing pools and disables them
  • Multi-device support (all or discrete selection)
  • Summarised and discrete device data statistics of requests, accepts, rejects, hw errors, efficiency and utility
  • Watchdog thread to restart idle threads but not crash machine if they don't respond
  • Summary displayed when quitting
  • Supports multiple pools with multiple intelligent failover mechanisms
  • On the fly menu based management of most settings
  • Trickling of extra work to backup pools if primary pool is responding but slow
  • On the fly enabling/disable/restarting of devices
  • Device temperature monitoring (for devices that support it)
  • Reuses persistent connections when possible
  • RPC +/- JSON interface for remote control
  • Ability to cope with slow routers
  • X-Reject-Reason support
  • Lots of other stuff I can't remember. See options.

See Also

External Links

References