Difference between revisions of "Avalon2"
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* http://avalon-asics.com/avalon-gen2-55nm-open-source-design-contest/ | * http://avalon-asics.com/avalon-gen2-55nm-open-source-design-contest/ | ||
* https://github.com/BitSyncom/Avalon2-ref/ | * https://github.com/BitSyncom/Avalon2-ref/ | ||
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| + | [[zh-cn:阿瓦隆]] | ||
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| + | [[Category:Hardware]] | ||
Revision as of 14:28, 6 November 2013
Avalon2 is the second machine of Avalon project. using the 55nm ASIC chips
Prototype
FPGA controller
2013-10-07
- fpga_controller_2013-10-07-A.mcs:
- Only support 16 miners, each miner have 6 A3255
- Cgminer: https://github.com/BitSyncom/cgminer/tree/avalon-55nm, https://github.com/BitSyncom/cgminer/commit/9d9450628923337646f4c50c1efd42652c97c7f9
