<?xml version="1.0"?>
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	<id>https://en.bitcoin.it/w/index.php?action=history&amp;feed=atom&amp;title=BTCMiner</id>
	<title>BTCMiner - Revision history</title>
	<link rel="self" type="application/atom+xml" href="https://en.bitcoin.it/w/index.php?action=history&amp;feed=atom&amp;title=BTCMiner"/>
	<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;action=history"/>
	<updated>2026-06-15T16:24:39Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
	<generator>MediaWiki 1.43.8</generator>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=56767&amp;oldid=prev</id>
		<title>Sunnankar: /* Usage */ Reference</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=56767&amp;oldid=prev"/>
		<updated>2015-06-01T01:33:42Z</updated>

		<summary type="html">&lt;p&gt;&lt;span class=&quot;autocomment&quot;&gt;Usage: &lt;/span&gt; Reference&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 01:33, 1 June 2015&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l16&quot;&gt;Line 16:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 16:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Usage ===&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Usage ===&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;All files required are packed into a single jar archive which can be downloaded from the download section of the [http://www.ztex.de/btcminer BTCMiner homepage] and runs under Linux and Windows. Windows users need to install the libusb driver from the ZTEX SDK.  &lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;All files required &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;for this * [http://www.bitcoinmining.com/bitcoin-mining-software/ Bitcoin mining software] &lt;/ins&gt;are packed into a single jar archive which can be downloaded from the download section of the [http://www.ztex.de/btcminer BTCMiner homepage] and runs under Linux and Windows. Windows users need to install the libusb driver from the ZTEX SDK.  &lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;br&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;A detailed description of the usage can be found at the [http://www.ztex.de/btcminer BTCMiner homepage].  &lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;A detailed description of the usage can be found at the [http://www.ztex.de/btcminer BTCMiner homepage].  &lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key db_bitcoin_en:diff:1.41:old-28427:rev-56767:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Sunnankar</name></author>
	</entry>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=28427&amp;oldid=prev</id>
		<title>Ztex at 07:53, 5 July 2012</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=28427&amp;oldid=prev"/>
		<updated>2012-07-05T07:53:32Z</updated>

		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 07:53, 5 July 2012&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l8&quot;&gt;Line 8:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 8:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with one XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with one XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with one XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;210 &lt;/del&gt;MH/s @ 9.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;4W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with one XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;215 &lt;/ins&gt;MH/s @ 9.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with one XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;210 &lt;/del&gt;MH/s @ 9.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;4W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with one XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;215 &lt;/ins&gt;MH/s @ 9.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15y.e.html Spartan 6 USB-FPGA Module 1.15y] with four XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;850 &lt;/del&gt;MH/s @ &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;38W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15y.e.html Spartan 6 USB-FPGA Module 1.15y] with four XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;860 &lt;/ins&gt;MH/s @ &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;39W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key db_bitcoin_en:diff:1.41:old-26026:rev-28427:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Ztex</name></author>
	</entry>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=26026&amp;oldid=prev</id>
		<title>Ztex: /* Features */</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=26026&amp;oldid=prev"/>
		<updated>2012-05-03T08:38:59Z</updated>

		<summary type="html">&lt;p&gt;&lt;span class=&quot;autocomment&quot;&gt;Features&lt;/span&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 08:38, 3 May 2012&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l10&quot;&gt;Line 10:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 10:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with one XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with one XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with one XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with one XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;15x&lt;/del&gt;.e.html Spartan 6 USB-FPGA Module 1.15y] with four XC6SLX150: 850 MH/s @ 38W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;15y&lt;/ins&gt;.e.html Spartan 6 USB-FPGA Module 1.15y] with four XC6SLX150: 850 MH/s @ 38W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key db_bitcoin_en:diff:1.41:old-26025:rev-26026:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Ztex</name></author>
	</entry>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=26025&amp;oldid=prev</id>
		<title>Ztex at 08:38, 3 May 2012</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=26025&amp;oldid=prev"/>
		<updated>2012-05-03T08:38:46Z</updated>

		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 08:38, 3 May 2012&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l7&quot;&gt;Line 7:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 7:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Features ===&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;=== Features ===&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;one &lt;/ins&gt;XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;one &lt;/ins&gt;XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with XC6SLX150: 210 MH/s @ 9.4W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;one &lt;/ins&gt;XC6SLX150: 210 MH/s @ 9.4W &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;(typical)&lt;/ins&gt;&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-side-deleted&quot;&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15y] with four XC6SLX150: 850 MH/s @ 38W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key db_bitcoin_en:diff:1.41:old-23637:rev-26025:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Ztex</name></author>
	</entry>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=23637&amp;oldid=prev</id>
		<title>Ztex at 20:40, 9 February 2012</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=23637&amp;oldid=prev"/>
		<updated>2012-02-09T20:40:10Z</updated>

		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 20:40, 9 February 2012&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l8&quot;&gt;Line 8:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 8:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;200 &lt;/del&gt;MH/s @ &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8&lt;/del&gt;.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;210 &lt;/ins&gt;MH/s @ &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;9&lt;/ins&gt;.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;4W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;200 &lt;/del&gt;MH/s @ &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8&lt;/del&gt;.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;210 &lt;/ins&gt;MH/s @ &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;9&lt;/ins&gt;.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;4W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key db_bitcoin_en:diff:1.41:old-20849:rev-23637:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Ztex</name></author>
	</entry>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=20849&amp;oldid=prev</id>
		<title>Ztex at 12:54, 14 December 2011</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=20849&amp;oldid=prev"/>
		<updated>2011-12-14T12:54:31Z</updated>

		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;table style=&quot;background-color: #fff; color: #202122;&quot; data-mw=&quot;interface&quot;&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;col class=&quot;diff-marker&quot; /&gt;
				&lt;col class=&quot;diff-content&quot; /&gt;
				&lt;tr class=&quot;diff-title&quot; lang=&quot;en&quot;&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan=&quot;2&quot; style=&quot;background-color: #fff; color: #202122; text-align: center;&quot;&gt;Revision as of 12:54, 14 December 2011&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot; id=&quot;mw-diff-left-l8&quot;&gt;Line 8:&lt;/td&gt;
&lt;td colspan=&quot;2&quot; class=&quot;diff-lineno&quot;&gt;Line 8:&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Supported FPGA Boards:&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;190 &lt;/del&gt;MH/s @ 8.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;5W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;200 &lt;/ins&gt;MH/s @ 8.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;−&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with XC6SLX150: &lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;190 &lt;/del&gt;MH/s @ 8.&lt;del style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;5W &lt;/del&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot; data-marker=&quot;+&quot;&gt;&lt;/td&gt;&lt;td style=&quot;color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with XC6SLX150: &lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;200 &lt;/ins&gt;MH/s @ 8.&lt;ins style=&quot;font-weight: bold; text-decoration: none;&quot;&gt;8W &lt;/ins&gt;(typical)&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;
&lt;tr&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;td class=&quot;diff-marker&quot;&gt;&lt;/td&gt;&lt;td style=&quot;background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;&quot;&gt;&lt;div&gt;* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;/div&gt;&lt;/td&gt;&lt;/tr&gt;

&lt;!-- diff cache key db_bitcoin_en:diff:1.41:old-18714:rev-20849:php=table --&gt;
&lt;/table&gt;</summary>
		<author><name>Ztex</name></author>
	</entry>
	<entry>
		<id>https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=18714&amp;oldid=prev</id>
		<title>Ztex: Page created</title>
		<link rel="alternate" type="text/html" href="https://en.bitcoin.it/w/index.php?title=BTCMiner&amp;diff=18714&amp;oldid=prev"/>
		<updated>2011-11-01T11:02:00Z</updated>

		<summary type="html">&lt;p&gt;Page created&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;== BTCMiner - Bitcoin Miner for ZTEX FPGA boards ==&lt;br /&gt;
&lt;br /&gt;
BTCMiner is an Open Source Bitcoin Miner for [http://www.ztex.de ZTEX USB-FPGA Modules 1.15]. These FPGA Boards contain an USB interface which is used for communication and programming (i.e. no JTAG programmer is required) and allows to build low cost FPGA clusters using standard components like USB hubs. &lt;br /&gt;
&lt;br /&gt;
The software runs on Linux and Windows.&lt;br /&gt;
&lt;br /&gt;
=== Features ===&lt;br /&gt;
* Supported FPGA Boards:&lt;br /&gt;
:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15b] with XC6SLX75: 90 MH/s @ 5.0W (typical)&lt;br /&gt;
:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html Spartan 6 USB-FPGA Module 1.15d] with XC6SLX150: 190 MH/s @ 8.5W (typical)&lt;br /&gt;
:* [http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html Spartan 6 USB-FPGA Module 1.15x] with XC6SLX150: 190 MH/s @ 8.5W (typical)&lt;br /&gt;
* Dynamic frequency scaling based on error measurement, i.e. BTCMiner automatically chooses the frequency with the highest rate of valid hashes.&lt;br /&gt;
* Cluster mode with hot-plugging allows to run large amounts of FPGA Boards&lt;br /&gt;
* Ready-to-use Bitstream, i.e. no Xilinx Software or License required&lt;br /&gt;
&lt;br /&gt;
=== Usage ===&lt;br /&gt;
All files required are packed into a single jar archive which can be downloaded from the download section of the [http://www.ztex.de/btcminer BTCMiner homepage] and runs under Linux and Windows. Windows users need to install the libusb driver from the ZTEX SDK. &lt;br /&gt;
&lt;br /&gt;
A detailed description of the usage can be found at the [http://www.ztex.de/btcminer BTCMiner homepage]. &lt;br /&gt;
&lt;br /&gt;
[[Category:Miners]]&lt;br /&gt;
[[Category:Open Source]]&lt;/div&gt;</summary>
		<author><name>Ztex</name></author>
	</entry>
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