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| Line 7: |
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| * Firmwares: http://downloads.canaan-creative.com/hardware/A3255/testing/ | | * Firmwares: http://downloads.canaan-creative.com/hardware/A3255/testing/ |
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| = Prototype = | | = [Avalon2 prototype Prototype] = |
| [[File:Avalon2 55nm prototype.jpeg | 320px]] | | [[File:Avalon2 55nm prototype.jpeg | 320px]] |
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| == Documents ==
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| * [http://downloads.canaan-creative.com/hardware/A3255/prototype/ Reference design]
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| * [http://downloads.canaan-creative.com/hardware/A3256/avalon/Manual/110G%20Hash%20Avalon%20Assemble%20Manual.pdf Assemble Manual]
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|
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| == Firmware ==
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| '''For latest 703N firmware please goto here: http://downloads.canaan-creative.com/software/avalon/latest/. from 20131229. the cgminer will support both Avalon 110nm and Avalon A3255 prototype machine.'''
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|
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| === [http://downloads.canaan-creative.com/hardware/A3255/prototype/ 2013-12-07] ===
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| * 8, 16 miners works just fine
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| * '''ISSUE''': 32 miners with 10 chips still not working because [https://en.bitcoin.it/wiki/Avalon2#TIMEOUT TIMEOUT issue]
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| * Change `core_count to 64 to compatible with ealier cgminer
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| * Software should follow equation below when handle A3255 based miner
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| nonce_send_to_pool = nonce_receive_from_miner-0xc0
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| * Include all hardware design files under this tar ball
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|
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| === TIMEOUT ===
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| * TIMEOUT的有效值范围为[0,255]，FPGA controller根据TIMEOUT的配置来控制申请/计算任务的时间。当TIMEOUT值配置为1时，FPGA controller会每隔0.033s申请一次任务，也表示芯片已计算完当前HASH区间。
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| * TIMEOUT配置与申请/计算任务时间间隔的公式为
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| TIME_OF_MINER_FINISH_HASH_RANGE = TIMEOUT * 0.033s
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| TIMEOUT = TIME_OF_MINER_FINISH_HASH_RANGE / 0.033s
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|
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| * 若FPGA controller连接的一个小模块上的计算能力为10GHs（10个芯片，每芯片1G），则FPGA controller申请任务的时间间隔为
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| 2^32 / 10*1000*1000*1000 = 0.4s
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| 0.4s/0.033s = 12 # TIMEOUT应配置为12
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|
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| * 如果使用prototype中的FPGA固件，你们的硬件设计一定要满足下面的式子：
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| 发送全部任务的时间 一定要小于 FPGA申请任务的时间(也就是ASIC算完自己区间的时间)
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| ((11+2+chip_num)*4*10/115200)*miner_num*1000 + DELAY_IN_MS*miner_num < (128591 / chip_num / frequency) * 33ms
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|
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| 解释一下：
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| 11+2+chip_num)*4 ==> CHIP_NUM的任务长度，单位Byte
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| ((11+2+chip_num)*4*10/115200)*miner_num*1000 ==> 发送MINER_NUM个这样的任务所需要的时间，单位是ms
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| DELAY_IN_MS*miner_num ==> 总的Delay时间，DELAY_IN_MS见cgminer代码：driver-avalon.c:1132
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| (128591 / chip_num / frequency) * 33ms ==> TIMEOUT值，详见Wiki文档
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|
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| 几个测试的例子，仅供参考：
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| MINER_NUM:CHIP_NUM:FREQUENCY:TIMEOUT
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| ==> 16:10:1000:12 works fine
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| ==> 16:10:1500:8 works fine
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| ==> 24:10:1000:12 works fine
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| ==> 24:10:1500:8 works fine
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| ==> 32:6:1000:21 works fine
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| ==> 32:6:1500:12 works fine
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| ==> 32:10:1000:12 works fine
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| ==> '''32:10:1500:8 not working'''
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|
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| == Work without LDO RT9187 ==
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| * Connect the C20 right pad to C15 or C14 left pad
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| * Please keep the Vcore to between 0.95v and 1.05v, the origin design was 1v.
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| * If the crystal not working, try to reduce the R28(by default it's 1K), if reduce the R28 didn't make crystal back to working. try repace the crystal with a better brand.
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|
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| [[File:Avalon2 work without LDO RT9187 2.jpeg | 320px]] [[File:Avalon2 work without LDO RT9187 1.jpeg | 320px]]
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|
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| = 55nm open design =
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| * form
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| https://github.com/formtapez/avalon
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| https://bitcointalk.org/index.php?topic=323175.0
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| Supported by official BFGMiner 3.8+
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| * flyonwall
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| https://bitcointalk.org/index.php?topic=323175.msg3759895#msg3759895
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| * Technobit Team
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| https://bitcointalk.org/index.php?topic=323727.0
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| here is the design, BOM：
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| http://ge.tt/2B4qW051/v/0?c
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| Here is CGminer patch and dd-wrt cgminer build
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| http://technobit.eu/index.php?controller=attachment&id_attachment=30
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| Windows drivers
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| http://technobit.eu/index.php?controller=attachment&id_attachment=9
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| Windows HEXminer software
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| http://technobit.eu/index.php?controller=attachment&id_attachment=29
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| Specs
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| 16 chip board
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| Hash rate - about 24 Gh/s overclocked
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| 16 bit PIC controller
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| 2 line power suply
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| Voltage controled by command in the software/firmware
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| USB connector
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| molex 4 pin power connector
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| Review: https://bitcointalk.org/index.php?topic=355323.0
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| * George Hahn
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| https://github.com/GeorgeHahn/Avalon
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| * Dan
| |
| http://arselin.com/drillbit/2013/12/01/avalon-gen2-miners-by-drillbit-systems/
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| http://www.drillbitsystem.com/avalon/
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| * Carlos
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| https://github.com/ctapang/DesignEntry/
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| * Zhaodong
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| https://github.com/BitDragonfly/A3256-mono
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| * Ardulon 2
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| https://code.google.com/p/ardulon-miner/source/browse/#svn%2Ftrunk
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|
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|
| = Chip sales agent = | | = Chip sales agent = |
